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i guess all my electronics units transfer

Posted by renesis at 15:54 | permalink | 0 comments


i could get that i think

Posted by renesis at 15:45 | permalink | 0 comments


hardcore bitches
timecop_: what
man give up at analogs

Posted by renesis at 15:29 | permalink | 0 comments


trolls irc
change your nick or die
no retarded pitz religions in #electronics
now hes quiet all of a sudden
haha what message
sucky, the religion of pitz
i guess my demographic (AA/AS degrees) is the most employed in america
because they find one of me that can do most of what one of you can do
and then they pay themselves with the difference
yarly
i read in multiple places
and it def seems true in a lot of engineering departments
heh yeah id prob drop out if i had to do pc tutorials all day

Posted by renesis at 15:24 | permalink | 0 comments


mark tool

Posted by renesis at 13:38 | permalink | 0 comments


srs

Posted by renesis at 13:28 | permalink | 0 comments


its just a half supply bias reference
its likely coming from a resistive divider w/ a big cap on it
or an opamp as a follower with a half supply bias reference
vref is a stupid name for it
it needs to be a regulated voltage
needs to be sink/source too

Posted by renesis at 13:12 | permalink | 0 comments


i would check the datasheet make sure the regs are setup the same
it might have more control regs with certain bits in different locations
nice
asm is way easier to read

Posted by renesis at 12:57 | permalink | 0 comments


ttmustang: are you loading regs manually?
like TCCR0H = 0xd1
or what
16b regs latch on low reg access im pretty sure
so to write, you do high reg then low
to read you do low then high
if timer2 is 8b and the other are 16b i would guess its that

Posted by renesis at 12:51 | permalink | 0 comments


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